STEMP Solutions trainers bring below unparalleled expertise to shape the future of global talents
Average 20+ years of individual trainer semiconductor experience at top international manufacturing plants
150+ years of collective experience of trainers
Trained Professionals
Years Average Trainer Experience
20+
Target Audience:
STEM students of age 15-18 years
Final year or placement year of an Engineering graduate including Physics and Chemistry
New hires, entry level employees of any semiconductor, Electronics, high tech precision engineering
Interactive AI based digital twin model simulators
Both short term and curriculum courses are highly customizable
Industry Case Studies and Videos included to enhance participants comprehension
Short Term Courses
Training Duration : 1 day to 2 weeks
On-site or online training
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Semiconductor Industry and Ecosystem
Introduction to Semiconductor Manufacturing
Introduction to Wafer Fabrication
Introduction to Semiconductor Packaging
Advanced Semiconductor Packaging
Semiconductor World for non-Engineers
Moore's Law, More than Moore
Advanced Scaling, Technology evolution, FinFETs, Ultra-thin Body SOI
Silicon Wafers
Cleanrooms, Environmental monitoring, Facilities management
CMOS Process Integration
More than Moore Technologies
MOSFET Physics and Reliability
Manufacturing Execution System [MES]
5S, Safety, Quality, Delivery, Cost, Capacity, Utilization, Yield, KPIs
Manufacturing Quality Assurance overview
Project Management (PMP/Agile)
Lean Six Sigma
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Defects and Wafer Inspection
Factory overview - Modules, Equipment, Manufacturing
Process, Equipment, Metrology
Oxidation, Wet Clean
Diffusion, Furnace & RTP
Ion Implant
Photolithography
Etch - Wet & Dry
Metallization
CVD (Chemical Vapor Depositition)
CMP (Chemical Mechanical Planarization)
Wafer level testing
Advanced Photolithography - Resolution Enhancement, Multiple Patterning, EUV
Atomic Layer Processing - ALD, ALE
Failure Analysis (FA) Techniques
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Process, Equipment, Metrology
Wafer Back Grinding
Wafer Dicing
Die Attach, Flip Chip
Wire Bonding
Encapsulation
Flip Chip Attach
Reliability of Wire Bonded Packages
Reliability of Flip Chip Packages
3D Packaging, TSV
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Applied FMEA [Failure Mode Effects and Analysis]
Automotive mindset, Control Plans
SPC [Statistical Process Control], OCAPs
Applied MSA [Measurement Systems Analysis]
Change Management in the Semiconductor World
Quality Management System and Audits
8D Problem Solving, Failure Analysis
QC Tools, Incoming & Outgoing QA
Curriculum Courses
3 - 15 weeks intensive training
On-site or online training and On the Job (OJT) training
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Combine any short term individual courses in wafer fabrication and/or packaging to form a curriculum
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Specification Definition
System Modelling
RTL Design & Simulation
Synthesis & Functional Verification
Static Timing Analysis (STA)
Design for Testability (DFT)
Netlist Extraction
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Floor Planning, Placement & Power Planning
Clock Tree Synthesis (CTS)
Physical Verification
Design for Manufacturability (DFM)
Netlist Extraction
Post Layout Simulation & Verification
GDS II Generation & Tape-out
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Specification Definition
Architecture Design
Behavioral Modelling
Circuit Design
Layout Design
Pre/Post Layout Simulations
GDS II Generation & Tape-out

